full name / name of organization: 
International Workshop on Highly Efficient Accelerators and Reconfigurable Technologies


The 2nd International Workshop on
Highly Efficient Accelerators and Reconfigurable Technologies
-- HEART2011 --
Imperial College, London, UK, June 2-3, 2011

    • Paper submission: February 15, 2011
    • Author notification: April 1, 2011
    • Camera-ready deadline: April 15, 2011
    • Workshop date: June 2-3, 2011

The 2nd International Workshop on Highly Efficient Accelerators and
Reconfigurable Technologies (HEART) is a forum to present and discuss
new research on accelerators and the use of reconfigurable
technologies for high-performance and/or power-efficient
computation. Submissions are solicited on a wide variety of topics
related to the acceleration for high-performance computation,
including but not limited to:

  • Architectures and systems:
    • Novel systems/platforms for efficient acceleration based on FPGA, GPU, CELL/B.E and other devices
    • Heterogeneous processors/systems for scalable, high-performance, high-reliability and/or low-power computation
    • Reconfigurable/configurable hardware and systems including IP-cores, embedded systems, SoCs and cluster/grid/cloud computing systems for scalable, high-performance and/or low-power processing
    • High-performance custom-computing processors/systems
    • Novel architectures and device technologies that can be applied to efficient acceleration, including many-core architectures, NoC architectures, 3D-stacking technologies and optical devices
  • Software and applications:
    • Novel applications for efficient acceleration systems/platforms, and custom computing
    • Compiler techniques and programming languages for efficient acceleration systems/platforms, including many-core processors, GPUs, FPGAs and other reconfigurable/custom processors
    • Run-time techniques for acceleration, including Just-in-Time compilation and dynamic partial-reconfiguration
    • Performance evaluation and analysis for efficient acceleration
    • High-level synthesis and design methodologies for heterogeneous, reconfigurable and/or custom processors/systems

In order to encourage open discussion on future directions, the
program committee will provide higher priority for papers that present
highly innovative and challenging ideas.

The submission procedure will be announced on the HEART2011 WEB in
detail. Papers are limited to 6 pages (two columns, US letter size,
10 points for main body text), and must be prepared in PDF format.
Format details will be available on the WEB. For double-blind review,
manuscripts must NOT identify authors; names of authors, affiliations,
e-mail addresses and self-references should be blanked out. Papers
that identify authors may be rejected without review.

For more information, please visit .

For any questions, please contact the Secretariat

Workshop Committees

  • Workshop Co-chairs:
    • Wayne Luk, Imperial College London, UK
    • Hideharu Amano, Keio University, JP
  • Program Co-chairs:
    • Yoshiki Yamaguchi, University of Tsukuba, JP
    • Martin Herbordt, Boston University, US
    • Khaled Benkrid, the University of Edinburgh, UK
  • Treasurer Chair:
    • Kentaro Sano, Tohoku University, JP
  • Publication Chair:
    • Yuichiro Shibata, Nagasaki University, JP
  • Publicity Chair:
    • Hironori Nakajo, Tokyo University of Agriculture and Technology, JP
  • Program Committee
    • Ahmet T. Erdogan, University of Edinburgh, UK
    • Ali Akoglu, University of Arizona, USA
    • Bharat Sukhwani, IBM T. J. Watson Research Center, USA
    • Herman Lam, University of Florida, USA
    • Minoru Watanabe, Shizuoka University, JP
    • Qiang Liu, Imperial College London, UK
    • Satnam Singh, Microsoft Research, UK
    • Smail Niar, University of Valenciennes and Hainaut-Cambresis, FR
    • Tom VanCourt, Akamai Technologies, USA
    • Tomonori Izumi, Ritsumeikan University, JP
    • Tsutomu Maruyama, University of Tsukuba, JP
    • Tsuyoshi Hamada, Nagasaki University, JP
    • Yajun HA, National University of Singapore, SG
    • Yohei Hori, National Institute of Advanced Industrial Science and Technology, JP
    • Wim Vanderbauwhede, Glasgow University, UK